From b8d28be4aa07b164e2d05f37f9b2e92bcddd8dfb Mon Sep 17 00:00:00 2001 From: GitHub Action Date: Sun, 14 Apr 2024 03:38:21 +0000 Subject: [PATCH] Sync files 514d6f07cbde3279a560355fefbc9b9087cf8c5a --- configfiles/02_network | 143 ++ configfiles/brcmfmac43430-sdio-panther-x2.sh | 14 + configfiles/config-5.10 | 1152 +++++++++++++++++ configfiles/config_data.txt | 17 + configfiles/init.sh | 288 +++++ configfiles/rk3566-jp-tvbox.dts | 736 +++++++++++ configfiles/rk3566-panther-x2.dts | 770 +++++++++++ .../rk3568-firefly-roc-pc-se-core.dtsi | 1016 +++++++++++++++ configfiles/rk3568-firefly-roc-pc-se.dts | 714 ++++++++++ configfiles/rk35xx.mk | 308 +++++ 10 files changed, 5158 insertions(+) create mode 100644 configfiles/02_network create mode 100644 configfiles/brcmfmac43430-sdio-panther-x2.sh create mode 100644 configfiles/config-5.10 create mode 100644 configfiles/config_data.txt create mode 100644 configfiles/init.sh create mode 100644 configfiles/rk3566-jp-tvbox.dts create mode 100644 configfiles/rk3566-panther-x2.dts create mode 100644 configfiles/rk3568-firefly-roc-pc-se-core.dtsi create mode 100644 configfiles/rk3568-firefly-roc-pc-se.dts create mode 100644 configfiles/rk35xx.mk diff --git a/configfiles/02_network b/configfiles/02_network new file mode 100644 index 0000000..38356b5 --- /dev/null +++ b/configfiles/02_network @@ -0,0 +1,143 @@ +#!/bin/sh +# +# Copyright (C) 2013-2015 OpenWrt.org +# + +. /lib/functions/uci-defaults.sh +. /lib/functions/system.sh + +rockchip_setup_interfaces() +{ + local board="$1" + + case "$board" in + armsom,sige7-v1|\ + easepi,ars4|\ + friendlyelec,nanopi-r5c|\ + friendlyelec,nanopi-r6c|\ + fastrhino,r66s|\ + hinlink,h88k-v2|\ + hinlink,h88k|\ + hinlink,opc-h66k|\ + hinlink,hnas|\ + jsy,h1|\ + nlnet,xgp|\ + firefly,rk3568-roc-pc) + ucidef_set_interfaces_lan_wan 'eth1' 'eth0' + ;; + hinlink,opc-h69k|\ + friendlyelec,nanopi-r5s) + ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0" + ;; + lyt,t68m|\ + fastrhino,r68s|\ + hinlink,opc-h68k) + ucidef_set_interfaces_lan_wan 'eth1 eth2 eth3' 'eth0' + ;; + friendlyelec,nanopi-r6s) + ucidef_set_interfaces_lan_wan 'eth2 eth0' 'eth1' + ;; + hinlink,h88k-v3) + ucidef_set_interfaces_lan_wan 'eth1 eth2 eth3 eth4' 'eth0' + ;; + hlink,h28k) + ucidef_set_interfaces_lan_wan 'eth0' 'eth1' + ;; + inspur,ihec301) + ucidef_add_switch "switch0" \ + "0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "7t@eth0" + ;; + *) + ucidef_set_interface_lan 'eth0' 'dhcp' + ;; + esac +} + +generate_mac_from_mmc() +{ + local sd_hash + local bootdisk=$( + . /lib/upgrade/common.sh + export_bootdevice && export_partdevice bootdisk 0 && echo $bootdisk + ) + if echo "$bootdisk" | grep -q '^mmcblk' && [ -f "/sys/class/block/$bootdisk/device/cid" ]; then + sd_hash=$(sha256sum /sys/class/block/$bootdisk/device/cid | head -n 1) + else + sd_hash=$(sha256sum /sys/class/block/mmcblk*/device/cid | head -n 1) + fi + local mac_base=$(macaddr_canonicalize "$(echo "${sd_hash}" | dd bs=1 count=12 2>/dev/null)") + echo "$(macaddr_unsetbit_mc "$(macaddr_setbit_la "${mac_base}")")" +} + +rockchip_setup_macs() +{ + local board="$1" + local lan_mac="" + local wan_mac="" + + case "$board" in + armsom,sige7-v1|\ + easepi,ars4|\ + firefly,rk3568-roc-pc|\ + friendlyelec,nanopi-r5s|\ + friendlyelec,nanopi-r5c|\ + friendlyelec,nanopi-r6s|\ + friendlyelec,nanopi-r6c|\ + hlink,h28k|\ + hinlink,h88k-*|\ + hinlink,h88k|\ + hinlink,opc-h69k|\ + hinlink,opc-h68k|\ + hinlink,opc-h66k|\ + hinlink,hnas|\ + jsy,h1|\ + yyy,h1|\ + idiskk,h1|\ + jp,tvbox|\ + panther,x2|\ + lyt,t68m|\ + nlnet,xgp|\ + fastrhino,r66s|\ + fastrhino,r68s) + wan_mac=$(generate_mac_from_mmc) + lan_mac=$(macaddr_add "$wan_mac" 1) + ;; + *) + lan_mac=$(generate_mac_from_mmc) + ;; + esac + + [ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac + [ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac +} + +generate_wwan_uci() +{ + local device="$1" + ucidef_set_interface "wwan" device "$device" protocol "modemmanager" metric "100" + [ -f /rom/note -o -f /etc/config/network ] || uci get firewall.@zone[1].network | grep -qFw wwan || uci add_list firewall.@zone[1].network='wwan' +} + +rockchip_setup_wwan() +{ + local board="$1" + + case "$board" in + hinlink,opc-h69k) + generate_wwan_uci "/sys/devices/platform/usbhost/fd000000.dwc3/xhci-hcd.0.auto/usb4/4-1" + ;; + hinlink,h88k-*|\ + hinlink,h88k) + generate_wwan_uci "/sys/devices/platform/usbdrd3_1/fc400000.usb/xhci-hcd.4.auto/usb6/6-1/6-1.1" + ;; + esac +} + +board_config_update +board=$(board_name) +rockchip_setup_interfaces $board +rockchip_setup_macs $board +rockchip_setup_wwan $board +board_config_flush + +exit 0 diff --git a/configfiles/brcmfmac43430-sdio-panther-x2.sh b/configfiles/brcmfmac43430-sdio-panther-x2.sh new file mode 100644 index 0000000..80f71de --- /dev/null +++ b/configfiles/brcmfmac43430-sdio-panther-x2.sh @@ -0,0 +1,14 @@ +#!/bin/bash + +# cd /lib/firmware/brcm/ + +wget -O /lib/firmware/brcm/brcmfmac43430-sdio.bin https://qsth520.gitee.io/files/wifi/brcmfmac43430-sdio.bin +wget -O /lib/firmware/brcm/brcmfmac43430-sdio.panther,x2.bin https://qsth520.gitee.io/files/wifi/brcmfmac43430-sdio.bin +wget -O /lib/firmware/brcm/brcmfmac43430-sdio.clm_blob https://qsth520.gitee.io/files/wifi/brcmfmac43430-sdio.clm_blob +wget -O /lib/firmware/brcm/brcmfmac43430-sdio.panther,x2.clm_blob https://qsth520.gitee.io/files/wifi/brcmfmac43430-sdio.clm_blob +wget -O /lib/firmware/brcm/brcmfmac43430-sdio.txt https://qsth520.gitee.io/files/wifi/brcmfmac43430-sdio +wget -O /lib/firmware/brcm/brcmfmac43430-sdio.panther,x2.txt https://qsth520.gitee.io/files/wifi/brcmfmac43430-sdio + +echo "WiFi驱动包已下载到指定目录完毕，正在重启系统中……" + +reboot \ No newline at end of file diff --git a/configfiles/config-5.10 b/configfiles/config-5.10 new file mode 100644 index 0000000..a9ef411 --- /dev/null +++ b/configfiles/config-5.10 @@ -0,0 +1,1152 @@ +CONFIG_64BIT=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDERFS=y +CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" +CONFIG_ANDROID_BINDER_IPC=y +# CONFIG_ANDROID_BINDER_IPC_SELFTEST is not set +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_CRYPTO=y +CONFIG_ARM64_MODULE_PLTS=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PTR_AUTH=y +CONFIG_ARM64_SVE=y +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_VA_BITS_39=y +CONFIG_ARMV8_DEPRECATED=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +CONFIG_ARM_PSCI_FW=y +CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y +CONFIG_ARM_ROCKCHIP_CPUFREQ=y +CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y +# CONFIG_ARM_SCMI_CPUFREQ is not set +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCMI_PROTOCOL=y +# CONFIG_ARM_SMMU is not set +# CONFIG_ARM_SMMU_V3 is not set +CONFIG_ASHMEM=y +CONFIG_ASN1=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_ASYMMETRIC_KEY_TYPE=y +CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y +CONFIG_ATA=y +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_AUDIT_COMPAT_GENERIC=y +CONFIG_AUDIT_GENERIC=y +CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS_FS=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BATTERY_SBS=y +# CONFIG_BFQ_CGROUP_DEBUG is not set +CONFIG_BFQ_GROUP_IOSCHED=y +CONFIG_BLK_CGROUP=y +CONFIG_BLK_CGROUP_RWSTAT=y +CONFIG_BLK_CMDLINE_PARSER=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_DM=y +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_NVME=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=8 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_THROTTLING=y +# CONFIG_BLK_DEV_THROTTLING_LOW is not set +CONFIG_BLK_INLINE_ENCRYPTION=y +CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_BT=y +CONFIG_BT_DEBUGFS=y +CONFIG_BUG_ON_DATA_CORRUPTION=y +# CONFIG_CACHEFILES is not set +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_CDROM=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CGROUP_NET_CLASSID=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CHARGER_GPIO=y +CONFIG_CLEANCACHE=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_MMIO=y +# CONFIG_CLK_PX30 is not set +# CONFIG_CLK_RK3036 is not set +# CONFIG_CLK_RK312X is not set +# CONFIG_CLK_RK3188 is not set +# CONFIG_CLK_RK322X is not set +CONFIG_CLK_RK3308=y +# CONFIG_CLK_RK3328 is not set +# CONFIG_CLK_RK3368 is not set +# CONFIG_CLK_RK3399 is not set +CONFIG_CLK_RK3528=y +CONFIG_CLK_RK3568=y +CONFIG_CLK_RK3588=y +# CONFIG_CLK_RV110X is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_CLZ_TAB=y +CONFIG_CMA=y +CONFIG_CMA_ALIGNMENT=8 +CONFIG_CMA_AREAS=7 +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_SIZE_MBYTES=16 +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +CONFIG_CMDLINE_PARTITION=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_PWM=y +CONFIG_COMMON_CLK_RK808=y +CONFIG_COMMON_CLK_ROCKCHIP=y +CONFIG_COMMON_CLK_SCMI=y +CONFIG_COMPAT=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_CONFIGFS_FS=y +CONFIG_CONNECTOR=y +CONFIG_CONTIG_ALLOC=y +CONFIG_CP15_BARRIER_EMULATION=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUSETS=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_THERMAL=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +CONFIG_CPU_PM=y +# CONFIG_CPU_PX30 is not set +# CONFIG_CPU_RK1808 is not set +CONFIG_CPU_RK3308=y +# CONFIG_CPU_RK3328 is not set +# CONFIG_CPU_RK3368 is not set +# CONFIG_CPU_RK3399 is not set +CONFIG_CPU_RK3528=y +# CONFIG_CPU_RK3562 is not set +CONFIG_CPU_RK3568=y +CONFIG_CPU_RK3588=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_THERMAL=y +CONFIG_CRC16=y +CONFIG_CRC7=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_BS=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CFB=y +CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_DEV_ROCKCHIP=y +# CONFIG_CRYPTO_DEV_ROCKCHIP_DEV is not set +# CONFIG_CRYPTO_DEV_ROCKCHIP_V1 is not set +CONFIG_CRYPTO_DEV_ROCKCHIP_V2=y +# CONFIG_CRYPTO_DEV_ROCKCHIP_V3 is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_CTR=y +CONFIG_CRYPTO_DRBG_HASH=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_ECC=y +CONFIG_CRYPTO_ECDH=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_MD4=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_OFB=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA512_ARM64=y +CONFIG_CRYPTO_SHA512_ARM64_CE=y +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_SM3=y +CONFIG_CRYPTO_SM4=y +CONFIG_CRYPTO_XTS=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_CREDENTIALS=y +CONFIG_DEBUG_DEVRES=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LIST=y +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEFAULT_BBR is not set +CONFIG_DEFAULT_HOSTNAME="localhost" +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP=y +# CONFIG_DEVFREQ_GOV_PASSIVE is not set +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DMABUF_CACHE=y +# CONFIG_DMABUF_DEBUG is not set +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_DMABUF_HEAPS_DEFERRED_FREE=y +CONFIG_DMABUF_HEAPS_PAGE_POOL=y +# CONFIG_DMABUF_HEAPS_ROCKCHIP is not set +# CONFIG_DMABUF_HEAPS_SRAM is not set +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_PARTIAL=y +CONFIG_DMABUF_SYSFS_STATS=y +CONFIG_DMADEVICES=y +CONFIG_DMA_CMA=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_PL330_DMA=y +CONFIG_DM_BUFIO=y +# CONFIG_DM_CRYPT is not set +# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set +# CONFIG_DM_INIT is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_SNAPSHOT is not set +CONFIG_DM_UEVENT=y +CONFIG_DM_VERITY=y +CONFIG_DM_VERITY_FEC=y +# CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG is not set +CONFIG_DNS_RESOLVER=y +# CONFIG_DPM_WATCHDOG is not set +CONFIG_DRM=y +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_DISPLAY_CONNECTOR=y +CONFIG_DRM_DP_AUX_CHARDEV=y +CONFIG_DRM_DW_HDMI_CEC=y +CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_KMS_FB_HELPER=y +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_MIPI_DSI=y +CONFIG_DRM_PANEL=y +CONFIG_DRM_PANEL_BRIDGE=y +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y +# CONFIG_DRM_ROCKCHIP is not set +# CONFIG_DRM_ROCKCHIP_VVOP is not set +CONFIG_DRM_SII902X=y +CONFIG_DTC=y +CONFIG_DT_IDLE_STATES=y +# CONFIG_DVB_CORE is not set +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_ROCKCHIP=y +CONFIG_DWMAC_ROCKCHIP_TOOL=y +CONFIG_DW_WATCHDOG=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ENERGY_MODEL=y +CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" +CONFIG_EXFAT_FS=y +CONFIG_EXPORTFS_BLOCK_OPS=y +CONFIG_EXT4_FS=y +CONFIG_EXTCON=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FANOTIFY=y +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" +CONFIG_FAT_FS=y +CONFIG_FB_CMDLINE=y +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +CONFIG_FIQ_DEBUGGER_TRUST_ZONE=y +# CONFIG_FIQ_DEBUGGER_UART_OVERLAY is not set +# CONFIG_FIQ_DEBUGGER_WAKEUP_IRQ_ALWAYS_ON is not set +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FRAME_POINTER=y +CONFIG_FREEZER=y +CONFIG_FRONTSWAP=y +CONFIG_FSCACHE=y +# CONFIG_FSCACHE_DEBUG is not set +# CONFIG_FSCACHE_HISTOGRAM is not set +# CONFIG_FSCACHE_OBJECT_LIST is not set +CONFIG_FSCACHE_STATS=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FUSE_FS=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GARP=y +CONFIG_GENERIC_ADC_THERMAL=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_CDEV_V1=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_ROCKCHIP=y +CONFIG_GRACE_PERIOD=y +CONFIG_GRO_CELLS=y +CONFIG_HAMRADIO=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HDMI=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_HWMON=y +CONFIG_HWSPINLOCK=y +CONFIG_HWSPINLOCK_ROCKCHIP=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OPTEE=y +CONFIG_HW_RANDOM_ROCKCHIP=y +CONFIG_HZ=300 +# CONFIG_HZ_100 is not set +CONFIG_HZ_300=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_GPIO=y +CONFIG_I2C_MUX=y +CONFIG_I2C_RK3X=y +CONFIG_IEP=y +CONFIG_IIO=y +CONFIG_IIO_BUFFER=y +CONFIG_IIO_KFIFO_BUF=y +CONFIG_IIO_SYSFS_TRIGGER=y +CONFIG_IIO_TRIGGER=y +CONFIG_IIO_TRIGGERED_BUFFER=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INPUT=y +CONFIG_INPUT_RK805_PWRKEY=y +CONFIG_IOMMU_API=y +# CONFIG_IOMMU_DEBUGFS is not set +# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_IOMMU_DMA=y +CONFIG_IOMMU_IOVA=y +CONFIG_IOMMU_LIMIT_IOVA_ALIGNMENT=y +CONFIG_IOMMU_IOVA_ALIGNMENT=4 +# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set +# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set +# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set +CONFIG_IOMMU_SUPPORT=y +# CONFIG_ION is not set +CONFIG_IOSCHED_BFQ=y +CONFIG_IP_FIB_TRIE_STATS=y +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_COMMON=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_BOOTP is not set +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_RARP=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_IRQ_WORK=y +CONFIG_ISDN_CAPI=y +CONFIG_ISO9660_FS=y +CONFIG_JBD2=y +CONFIG_JUMP_LABEL=y +CONFIG_KCMP=y +CONFIG_KEYS=y +# CONFIG_KPC2000 is not set +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_DISK=y +CONFIG_LEDS_TRIGGER_GPIO=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_LIBCRC32C=y +CONFIG_LIBFDT=y +CONFIG_LKDTM=y +CONFIG_LOCKD=y +CONFIG_LOCKUP_DETECTOR=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LSM_MMAP_MIN_ADDR=4096 +CONFIG_LZ4_DECOMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MAC_PARTITION=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0 +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +# CONFIG_MALI400 is not set +CONFIG_MALI450=y +CONFIG_MALI470=y +# CONFIG_MALI400_DEBUG is not set +# CONFIG_MALI400_PROFILING is not set +# CONFIG_MALI400_UMP is not set +CONFIG_MALI_DMA_BUF_MAP_ON_ATTACH=y +CONFIG_MALI_SHARED_INTERRUPTS=y +# CONFIG_MALI_PMU_PARALLEL_POWER_UP is not set +CONFIG_MALI_DT=y +CONFIG_MALI_DEVFREQ=y +# CONFIG_MALI_QUIET is not set +# CONFIG_MALI_MIDGARD is not set +CONFIG_MALI_EXPERT=y +CONFIG_MALI_PLATFORM_THIRDPARTY=y +CONFIG_MALI_PLATFORM_THIRDPARTY_NAME="rk" +CONFIG_MALI_DEBUG=y +CONFIG_MALI_PWRSOFT_765=y +# CONFIG_MALI_BIFROST is not set +CONFIG_MALI_PLATFORM_NAME="rk" +# CONFIG_MALI_CSF_SUPPORT is not set +# CONFIG_MALI_ARBITER_SUPPORT is not set +CONFIG_MALI_BIFROST_EXPERT=y +CONFIG_MALI_BIFROST_DEBUG=y +# CONFIG_MALI_KUTF is not set +CONFIG_MALI_REAL_HW=y +# CONFIG_MALI_BIFROST_NO_MALI is not set +CONFIG_MALI_BIFROST_DEVFREQ=y +CONFIG_MALI_BIFROST_GATOR_SUPPORT=y +# CONFIG_MALI_BIFROST_ENABLE_TRACE is not set +# CONFIG_MALI_FW_CORE_DUMP is not set +# CONFIG_MALI_DMA_BUF_MAP_ON_DEMAND is not set +# CONFIG_MALI_DMA_BUF_LEGACY_COMPAT is not set +# CONFIG_MALI_CORESIGHT is not set +# CONFIG_MALI_2MB_ALLOC is not set +# CONFIG_MALI_MEMORY_FULLY_BACKED is not set +# CONFIG_MALI_CORESTACK is not set +# CONFIG_MALI_GEM5_BUILD is not set +# CONFIG_MALI_BIFROST_FENCE_DEBUG is not set +# CONFIG_MALI_BIFROST_SYSTEM_TRACE is not set +CONFIG_MALI_PRFCNT_SET_PRIMARY=y +# CONFIG_MALI_BIFROST_PRFCNT_SET_SECONDARY is not set +# CONFIG_MALI_PRFCNT_SET_TERTIARY is not set +# CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS is not set +# CONFIG_MALI_JOB_DUMP is not set +# CONFIG_MALI_HW_ERRATA_1485982_NOT_AFFECTED is not set +# CONFIG_MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE is not set +# CONFIG_MALI_ARBITRATION is not set +CONFIG_MD=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +CONFIG_MEDIA_TUNER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_KMEM=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMFD_CREATE=y +CONFIG_MEMORY=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_KHADAS_MCU is not set +CONFIG_MFD_RK806=y +CONFIG_MFD_RK806_SPI=y +CONFIG_MFD_RK808=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CQHCI=y +CONFIG_MMC_DW=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_HSQ=y +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_OF_ARASAN is not set +CONFIG_MMC_SDHCI_OF_DWCMSHC=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_TEST=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MOTORCOMM_PHY=y +CONFIG_MPILIB=y +CONFIG_MPLS=y +CONFIG_MRP=y +CONFIG_MSDOS_FS=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_BLOCK is not set +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NAMESPACES=y +# CONFIG_NCSI_OEM_CMD_GET_MAC is not set +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NETFILTER=y +CONFIG_NETLABEL=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_CLS_CGROUP is not set +CONFIG_NET_EMATCH=y +CONFIG_NET_FC=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_L3_MASTER_DEV=y +CONFIG_NET_NCSI=y +CONFIG_NET_NS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_FS=y +CONFIG_NFS_USE_KERNEL_DNS=y +# CONFIG_NFS_USE_LEGACY_DNS is not set +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NLS=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_936=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_UTF8=y +CONFIG_NO_GKI=y +CONFIG_NO_HZ=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=8 +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_NVME_CORE=y +# CONFIG_NVME_HWMON is not set +CONFIG_NVME_MULTIPATH=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_DYNAMIC=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IOMMU=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OF_OVERLAY=y +CONFIG_OF_RESOLVE=y +CONFIG_OID_REGISTRY=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +CONFIG_OVERLAY_FS_INDEX=y +# CONFIG_OVERLAY_FS_NFS_EXPORT is not set +CONFIG_PADATA=y +CONFIG_PAGE_COUNTER=y +CONFIG_PAGE_POOL=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_PARTITION_PERCPU=y +CONFIG_PCI=y +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEFAULT is not set +CONFIG_PCIEASPM_PERFORMANCE=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_DW_ROCKCHIP=y +# CONFIG_PCIE_DW_ROCKCHIP_EP is not set +CONFIG_PCIE_PME=y +CONFIG_PCIE_RK_THREADED_INIT=y +# CONFIG_PCIE_ROCKCHIP_HOST is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCS_XPCS=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYS_ADDR_T_64BIT=y +# CONFIG_PHY_ROCKCHIP_DP is not set +# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set +CONFIG_PHY_ROCKCHIP_EMMC=y +# CONFIG_PHY_ROCKCHIP_INNO_COMBPHY is not set +# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set +# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_INNO_USB3=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY=y +# CONFIG_PHY_ROCKCHIP_NANENG_EDP is not set +CONFIG_PHY_ROCKCHIP_NANENG_USB2=y +CONFIG_PHY_ROCKCHIP_PCIE=y +# CONFIG_PHY_ROCKCHIP_SAMSUNG_DCPHY is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX is not set +# CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI is not set +CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y +CONFIG_PHY_ROCKCHIP_TYPEC=y +# CONFIG_PHY_ROCKCHIP_USB is not set +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_RK805=y +CONFIG_PINCTRL_RK806=y +CONFIG_PINCTRL_ROCKCHIP=y +CONFIG_PKCS7_MESSAGE_PARSER=y +# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set +CONFIG_PM=y +CONFIG_PM_ADVANCED_DEBUG=y +CONFIG_PM_CLK=y +CONFIG_PM_DEBUG=y +CONFIG_PM_DEVFREQ=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_PM_OPP=y +CONFIG_PNFS_BLOCK=y +CONFIG_PNFS_FILE_LAYOUT=y +CONFIG_PNFS_FLEXFILE_LAYOUT=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_SUPPLY=y +CONFIG_PPP=y +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_PRINTK_TIME=y +CONFIG_PROC_EVENTS=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_PROFILING=y +CONFIG_PSTORE=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_PMSG=y +CONFIG_PSTORE_RAM=y +CONFIG_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_PWM_ROCKCHIP_ONESHOT=y +CONFIG_PWM_SYSFS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_RATIONAL=y +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_REALTEK_PHY=y +CONFIG_REBOOT_MODE=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_SPI=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK806=y +CONFIG_REGULATOR_RK808=y +CONFIG_REGULATOR_RK860X=y +CONFIG_RELOCATABLE=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SCMI=y +CONFIG_RFS_ACCEL=y +CONFIG_RFKILL_RK=y +CONFIG_RK_CMA_PROCFS=y +CONFIG_RK_CONSOLE_THREAD=y +CONFIG_RK_DMABUF_PROCFS=y +CONFIG_RK_MEMBLOCK_PROCFS=y +# CONFIG_ROCKCHIP_AMP is not set +# CONFIG_ROCKCHIP_ANALOGIX_DP is not set +# CONFIG_ROCKCHIP_ARM64_ALIGN_FAULT_FIX is not set +# CONFIG_ROCKCHIP_CDN_DP is not set +# CONFIG_ROCKCHIP_CLK_BOOST is not set +# CONFIG_ROCKCHIP_CLK_COMPENSATION is not set +CONFIG_ROCKCHIP_CLK_INV=y +CONFIG_ROCKCHIP_CLK_LINK=y +CONFIG_ROCKCHIP_CLK_OUT=y +CONFIG_ROCKCHIP_CLK_PVTM=y +CONFIG_ROCKCHIP_CPUINFO=y +CONFIG_ROCKCHIP_DEBUG=y +CONFIG_ROCKCHIP_DRM_CUBIC_LUT=y +CONFIG_ROCKCHIP_DRM_DEBUG=y +# CONFIG_ROCKCHIP_DRM_DIRECT_SHOW is not set +# CONFIG_ROCKCHIP_DRM_TVE is not set +CONFIG_ROCKCHIP_DVBM=y +CONFIG_ROCKCHIP_DVBM_PROC_FS=y +# CONFIG_ROCKCHIP_DW_DP is not set +# CONFIG_ROCKCHIP_DW_HDMI is not set +# CONFIG_ROCKCHIP_DW_HDCP2 is not set +# CONFIG_ROCKCHIP_DW_MIPI_DSI is not set +CONFIG_ROCKCHIP_EFUSE=y +CONFIG_ROCKCHIP_FIQ_DEBUGGER=y +CONFIG_ROCKCHIP_GRF=y +CONFIG_ROCKCHIP_HW_DECOMPRESS=y +CONFIG_ROCKCHIP_HW_DECOMPRESS_USER=y +# CONFIG_ROCKCHIP_INNO_HDMI is not set +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_ROCKCHIP_IOMMU=y +# CONFIG_ROCKCHIP_IOMUX is not set +CONFIG_ROCKCHIP_IPA=y +# CONFIG_ROCKCHIP_LVDS is not set +CONFIG_ROCKCHIP_MBOX=y +# CONFIG_ROCKCHIP_MINI_KERNEL is not set +CONFIG_ROCKCHIP_MMC_VENDOR_STORAGE=y +CONFIG_ROCKCHIP_MPP_AV1DEC=y +CONFIG_ROCKCHIP_MPP_IEP2=y +CONFIG_ROCKCHIP_MPP_JPGDEC=y +CONFIG_ROCKCHIP_MPP_PROC_FS=y +CONFIG_ROCKCHIP_MPP_RKVDEC=y +CONFIG_ROCKCHIP_MPP_RKVDEC2=y +CONFIG_ROCKCHIP_MPP_RKVENC=y +CONFIG_ROCKCHIP_MPP_RKVENC2=y +CONFIG_ROCKCHIP_MPP_SERVICE=y +CONFIG_ROCKCHIP_MPP_VDPP=y +CONFIG_ROCKCHIP_MPP_VDPU1=y +CONFIG_ROCKCHIP_MPP_VDPU2=y +CONFIG_ROCKCHIP_MPP_VEPU1=y +CONFIG_ROCKCHIP_MPP_VEPU2=y +# CONFIG_ROCKCHIP_MULTI_RGA_LEGACY_ABI is not set +# CONFIG_ROCKCHIP_NPOR_POWERGOOD is not set +CONFIG_ROCKCHIP_OPP=y +# CONFIG_ROCKCHIP_OPTIMIZE_RT_PRIO is not set +CONFIG_ROCKCHIP_OTP=y +CONFIG_ROCKCHIP_PCIE_DMA_OBJ=y +CONFIG_ROCKCHIP_PERFORMANCE=y +CONFIG_ROCKCHIP_PERFORMANCE_LEVEL=2 +CONFIG_ROCKCHIP_PHY=y +CONFIG_ROCKCHIP_PLL_RK3588=y +CONFIG_ROCKCHIP_PM_DOMAINS=y +CONFIG_ROCKCHIP_PVTM=y +# CONFIG_ROCKCHIP_RAMDISK is not set +# CONFIG_ROCKCHIP_RGA is not set +CONFIG_ROCKCHIP_MULTI_RGA=y +CONFIG_ROCKCHIP_RGA_ASYNC=y +CONFIG_ROCKCHIP_RGA_DEBUGGER=y +CONFIG_ROCKCHIP_RGA_DEBUG_FS=y +CONFIG_ROCKCHIP_RGA_PROC_FS=y +# CONFIG_ROCKCHIP_RGB is not set +# CONFIG_ROCKCHIP_RK3066_HDMI is not set +# CONFIG_ROCKCHIP_RKNPU is not set +CONFIG_ROCKCHIP_RKNPU_DEBUG_FS=y +# CONFIG_ROCKCHIP_RKNPU_DRM_GEM is not set +# CONFIG_ROCKCHIP_RKNPU_DMA_HEAP is not set +# CONFIG_ROCKCHIP_RKNPU_FENCE is not set +# CONFIG_ROCKCHIP_RKNPU_PROC_FS is not set +# CONFIG_ROCKCHIP_RKNPU_SRAM is not set +# CONFIG_ROCKCHIP_RVE is not set +CONFIG_ROCKCHIP_SARADC=y +# CONFIG_ROCKCHIP_SARADC_TEST_CHN is not set +CONFIG_ROCKCHIP_SIP=y +CONFIG_ROCKCHIP_SUSPEND_MODE=y +CONFIG_ROCKCHIP_SYSTEM_MONITOR=y +CONFIG_ROCKCHIP_THERMAL=y +CONFIG_ROCKCHIP_TIMER=y +# CONFIG_ROCKCHIP_VCONN is not set +CONFIG_ROCKCHIP_VENDOR_STORAGE=y +CONFIG_ROCKCHIP_VENDOR_STORAGE_UPDATE_LOADER=y +# CONFIG_ROCKCHIP_VOP is not set +# CONFIG_ROCKCHIP_VOP2 is not set +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_ROOT_NFS=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_RK808=y +CONFIG_RTC_DRV_HYM8563=y +CONFIG_RTC_I2C_AND_SPI=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SATA_HOST=y +CONFIG_SATA_PMP=y +CONFIG_SATA_PMP_LEDS=y +CONFIG_SCHEDSTATS=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_SCHED_INFO=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_STACK_END_CHECK=y +CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCSI=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_SPI_ATTRS=y +CONFIG_SENSORS_ARM_SCMI=y +CONFIG_SENSORS_DRIVETEMP=y +CONFIG_SENSORS_GPIO_FAN=y +CONFIG_SENSORS_PWM_FAN=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_NR_UARTS=10 +CONFIG_SERIAL_8250_RUNTIME_UARTS=10 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SETEND_EMULATION=y +CONFIG_SG_POOL=y +CONFIG_SKB_EXTENSIONS=y +CONFIG_SLHC=y +CONFIG_SMP=y +CONFIG_SND=y +# CONFIG_SND_COMPRESS_OFFLOAD is not set +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_HRTIMER=y +CONFIG_SND_JACK=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_ELD=y +CONFIG_SND_PCM_IEC958=y +CONFIG_SND_RAWMIDI=y +CONFIG_SND_SEQUENCER=y +# CONFIG_SND_SEQUENCER_OSS is not set +CONFIG_SND_SEQ_DEVICE=y +CONFIG_SND_SEQ_DUMMY=y +CONFIG_SND_SEQ_HRTIMER_DEFAULT=y +CONFIG_SND_SEQ_MIDI=y +CONFIG_SND_SEQ_MIDI_EVENT=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_BT_SCO=y +CONFIG_SND_SOC_HDMI_CODEC=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_RK3288_HDMI_ANALOG is not set +# CONFIG_SND_SOC_RK3308 is not set +# CONFIG_SND_SOC_RK3399_GRU_SOUND is not set +CONFIG_SND_SOC_RK3528=y +CONFIG_SND_SOC_RK817=y +CONFIG_SND_SOC_RK_CODEC_DIGITAL=y +CONFIG_SND_SOC_ROCKCHIP=y +# CONFIG_SND_SOC_ROCKCHIP_HDMI is not set +# CONFIG_SND_SOC_ROCKCHIP_I2S is not set +# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM is not set +# CONFIG_SND_SOC_ROCKCHIP_MAX98090 is not set +# CONFIG_SND_SOC_ROCKCHIP_MULTICODECS is not set +# CONFIG_SND_SOC_ROCKCHIP_PDM is not set +# CONFIG_SND_SOC_ROCKCHIP_RT5645 is not set +# CONFIG_SND_SOC_ROCKCHIP_SPDIF is not set +CONFIG_SND_TIMER=y +CONFIG_SND_VERBOSE_PRINTK=y +# CONFIG_SND_VIRMIDI is not set +CONFIG_SOCK_CGROUP_DATA=y +CONFIG_SOFTLOCKUP_DETECTOR=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_DYNAMIC=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_ROCKCHIP=y +# CONFIG_SPI_ROCKCHIP_MISCDEV is not set +CONFIG_SPI_SPIDEV=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_ZSTD=y +CONFIG_SRAM=y +CONFIG_SRCU=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_ETHTOOL=y +CONFIG_STMMAC_FULL=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_STMMAC_UIO=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_BACKCHANNEL=y +CONFIG_SUNRPC_DEBUG=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_SWAP=y +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATION=y +CONFIG_SW_SYNC=y +CONFIG_SW_SYNC_DEBUG=y +CONFIG_SYNC_FILE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_TASK_XACCT=y +CONFIG_TCP_CONG_BBR=y +CONFIG_TEE=y +CONFIG_TEST_POWER=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_MMIO=y +CONFIG_THERMAL_OF=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TRANSPARENT_HUGEPAGE=y +# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_TTY_PRINTK=y +CONFIG_TTY_PRINTK_LEVEL=6 +CONFIG_TYPEC=y +# CONFIG_TYPEC_DP_ALTMODE is not set +CONFIG_TYPEC_FUSB302=y +# CONFIG_TYPEC_HD3SS3220 is not set +CONFIG_TYPEC_HUSB311=y +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# CONFIG_TYPEC_RT1711H is not set +# CONFIG_TYPEC_STUSB160X is not set +# CONFIG_TYPEC_TPS6598X is not set +CONFIG_TYPEC_TCPCI=y +# CONFIG_TYPEC_TCPCI_MAXIM is not set +CONFIG_TYPEC_TCPM=y +# CONFIG_UACCE is not set +# CONFIG_UBIFS_FS is not set +# CONFIG_UCLAMP_TASK is not set +# CONFIG_UIO_CIF is not set +# CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_DMEM_GENIRQ is not set +# CONFIG_UIO_AEC is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_UIO_PCI_GENERIC is not set +# CONFIG_UIO_NETX is not set +# CONFIG_UIO_PRUSS is not set +# CONFIG_UIO_MF624 is not set +# CONFIG_UIO_HV_GENERIC is not set +CONFIG_UNICODE=y +# CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_HID=y +# CONFIG_USB_CONFIGFS_F_LB_SS is not set +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_PRINTER=y +# CONFIG_USB_CONFIGFS_F_UAC1 is not set +# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_UVC=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_DUAL_ROLE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_DUAL_ROLE=y +# CONFIG_USB_DWC3_GADGET is not set +# CONFIG_USB_DWC3_HOST is not set +CONFIG_USB_DWC3_OF_SIMPLE=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +CONFIG_USB_FUNCTIONFS=y +CONFIG_USB_FUNCTIONFS_ETH=y +CONFIG_USB_FUNCTIONFS_GENERIC=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +CONFIG_USB_F_ACM=y +CONFIG_USB_F_ECM=y +CONFIG_USB_F_EEM=y +CONFIG_USB_F_FS=y +CONFIG_USB_F_HID=y +CONFIG_USB_F_MASS_STORAGE=y +CONFIG_USB_F_MIDI=y +CONFIG_USB_F_NCM=y +CONFIG_USB_F_OBEX=y +CONFIG_USB_F_PRINTER=y +CONFIG_USB_F_RNDIS=y +CONFIG_USB_F_SERIAL=y +CONFIG_USB_F_SUBSET=y +CONFIG_USB_F_UAC2=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGETFS=y +CONFIG_USB_LIBCOMPOSITE=y +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_HCD_PLATFORM is not set +CONFIG_USB_OTG=y +CONFIG_USB_PHY=y +CONFIG_USB_ROLE_SWITCH=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_CONSOLE=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_UAS=y +CONFIG_USB_U_AUDIO=y +CONFIG_USB_U_ETHER=y +CONFIG_USB_U_SERIAL=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USERFAULTFD=y +CONFIG_USERMODE_DRIVER=y +CONFIG_USER_NS=y +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_VFAT_FS=y +CONFIG_VIDEOMODE_HELPERS=y +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_VMAP_STACK=y +CONFIG_WATCHDOG_CORE=y +CONFIG_X509_CERTIFICATE_PARSER=y +CONFIG_XARRAY_MULTI=y +CONFIG_XFRM_ALGO=y +CONFIG_XFRM_STATISTICS=y +CONFIG_XFRM_USER=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZISOFS=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZONE_DMA32=y +CONFIG_ZSTD_DECOMPRESS=y +# CONFIG_ZSWAP is not set diff --git a/configfiles/config_data.txt b/configfiles/config_data.txt new file mode 100644 index 0000000..e8bb16a --- /dev/null +++ b/configfiles/config_data.txt @@ -0,0 +1,17 @@ +# CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_mangopi_m28k is not set +# CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_nlnet_xgp is not set + +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_easepi_ars4=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_fastrhino_r6xs=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_firefly_station-p2=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_friendlyarm_nanopi-r5s=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_friendlyarm_nanopi-r6s=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_hinlink_h88k=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_hinlink_opc-h6xk=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_hlink_h28k=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_idiskk_h1=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_lyt_t68m=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_yyy_h1=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_jp_tvbox=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_panther_x2=y +CONFIG_TARGET_DEVICE_rockchip_rk35xx_DEVICE_dg_nas=y diff --git a/configfiles/init.sh b/configfiles/init.sh new file mode 100644 index 0000000..4873902 --- /dev/null +++ b/configfiles/init.sh @@ -0,0 +1,288 @@ +#!/bin/sh +# based on https://github.com/6ang996/istoreos-rk356x/blob/rk356x/target/linux/rk356x/armv8/base-files/etc/init.d/rename_iface + +. /lib/functions.sh + +NPROCS="$(grep -c "^processor.*:" /proc/cpuinfo)" +PROC_MASK="$(( (1 << $NPROCS) - 1 ))" +PROC_MASK="$(printf %x "$PROC_MASK")" + +rename_iface() { + ip link set $1 down && ip link set $1 name $2 +} + +get_iface_device() { + basename $(readlink /sys/class/net/$1/device) +} + +set_iface_cpumask() { + local core_mask="$1" + local interface="$2" + local device="$3" + local irq + local seconds + local mq + local q + local queue_mask=$(( 0x${PROC_MASK} ^ 0x${core_mask} )) + queue_mask="$(printf %x "$queue_mask")" + local mq_mask="$4" + + [[ -d "/sys/class/net/${interface}" ]] || return 1 + + [[ -n "${device}" && "${device}" = "${interface}-*" ]] && mq=1 + + [[ -z "${mq}" || "${device}" = "${interface}-0" ]] && ip link set dev "${interface}" up + + [[ -z "${device}" ]] && device="$interface" + + for seconds in $(seq 0 1); do + irq=$(grep -m1 " ${device}\$" /proc/interrupts | sed -n -e 's/^ *\([^ :]\+\):.*$/\1/p') + if [ -n "${irq}" ]; then + echo "${core_mask}" > /proc/irq/${irq}/smp_affinity + if [[ -z "${mq}" ]]; then + echo "${queue_mask}" > /sys/class/net/$interface/queues/rx-0/rps_cpus + echo "${queue_mask}" > /sys/class/net/$interface/queues/tx-0/xps_cpus + elif [[ "${device}" = "${interface}-0" ]]; then + [[ -n "$mq_mask" ]] || mq_mask="${queue_mask}" + for q in /sys/class/net/$interface/queues/rx-*; do + echo "$mq_mask" > "$q/rps_cpus" + done + # for q in /sys/class/net/$interface/queues/tx-*; do + # echo "$mq_mask" > "$q/xps_cpus" + # done + fi + return 0 + fi + sleep 1 + done + return 1 +} + +board_fixup_iface_name() { + local device + case $(board_name) in + friendlyelec,nanopi-r5c|\ + fastrhino,r66s) + device="$(get_iface_device eth0)" + if [[ "$device" = "0001:11:00.0" ]]; then + rename_iface eth0 lan1 + rename_iface eth1 eth0 + rename_iface lan1 eth1 + fi + ;; + easepi,ars4|\ + jsy,h1|\ + hinlink,hnas|\ + hinlink,opc-h66k) + device="$(get_iface_device eth1)" + if [[ "$device" = "0001:11:00.0" ]]; then + rename_iface eth0 lan1 + rename_iface eth1 eth0 + rename_iface lan1 eth1 + fi + ;; + lyt,t68m|\ + fastrhino,r68s) + device="$(get_iface_device eth0)" + if [[ "$device" = "fe010000.ethernet" ]]; then + rename_iface eth0 wan + rename_iface eth1 eth0 + rename_iface wan eth1 + fi + device="$(get_iface_device eth3)" + if [[ "$device" = "0002:21:00.0" ]]; then + rename_iface eth2 lan3 + rename_iface eth3 eth2 + rename_iface lan3 eth3 + fi + ;; + firefly,rk3568-roc-pc) + device="$(get_iface_device eth0)" + if [[ "$device" = "fe010000.ethernet" ]]; then + rename_iface eth0 wan + rename_iface eth1 eth0 + rename_iface wan eth1 + fi + ;; + friendlyelec,nanopi-r5s) + device="$(get_iface_device eth2)" + # r5s lan1 is under pcie2x1 + if [[ "$device" = "0000:01:00.0" ]]; then + rename_iface eth1 lan2 + rename_iface eth2 eth1 + rename_iface lan2 eth2 + fi + ;; + hinlink,opc-h68k) + device="$(get_iface_device eth1)" + if [[ "$device" = "fe010000.ethernet" ]]; then + rename_iface eth0 wan + rename_iface eth1 eth0 + rename_iface wan eth1 + fi + device="$(get_iface_device eth3)" + if [[ "$device" = "0001:11:00.0" ]]; then + rename_iface eth2 lan3 + rename_iface eth3 eth2 + rename_iface lan3 eth3 + fi + ;; + hinlink,opc-h69k) + device="$(get_iface_device eth2)" + if [[ "$device" = "0001:11:00.0" ]]; then + rename_iface eth1 lan2 + rename_iface eth2 eth1 + rename_iface lan2 eth2 + fi + ;; + hinlink,h88k-v3|\ + friendlyelec,nanopi-r6s) + device="$(get_iface_device eth1)" + if [[ "$device" = "0004:41:00.0" ]]; then + rename_iface eth1 lan2 + rename_iface eth2 eth1 + rename_iface lan2 eth2 + fi + ;; + armsom,sige7-v1) + device="$(get_iface_device eth1)" + if [[ "$device" = "0004:41:00.0" ]]; then + rename_iface eth1 wan + rename_iface eth0 eth1 + rename_iface wan eth0 + fi + ;; + esac +} + +board_set_iface_smp_affinity() { + case $(board_name) in + firefly,rk3568-roc-pc) + set_iface_cpumask 2 eth0 + set_iface_cpumask 4 eth1 + ;; + hinlink,opc-h69k|\ + friendlyelec,nanopi-r5s) + set_iface_cpumask 2 eth0 + if ethtool -i eth1 | grep -Fq 'driver: r8169'; then + set_iface_cpumask 4 "eth1" + set_iface_cpumask 8 "eth2" + else + set_iface_cpumask 4 "eth1" "eth1-0" && \ + set_iface_cpumask 4 "eth1" "eth1-16" && \ + set_iface_cpumask 2 "eth1" "eth1-18" && \ + set_iface_cpumask 8 "eth2" "eth2-0" && \ + set_iface_cpumask 8 "eth2" "eth2-18" && \ + set_iface_cpumask 1 "eth2" "eth2-16" + fi + ;; + lyt,t68m|\ + fastrhino,r68s|\ + hinlink,opc-h68k) + set_iface_cpumask 1 "eth0" + set_iface_cpumask 2 "eth1" + if ethtool -i eth2 | grep -Fq 'driver: r8169'; then + set_iface_cpumask 4 "eth2" + set_iface_cpumask 8 "eth3" + else + set_iface_cpumask 4 "eth2" "eth2-0" && \ + set_iface_cpumask 4 "eth2" "eth2-16" && \ + set_iface_cpumask 2 "eth2" "eth2-18" && \ + set_iface_cpumask 8 "eth3" "eth3-0" && \ + set_iface_cpumask 8 "eth3" "eth3-18" && \ + set_iface_cpumask 1 "eth3" "eth3-16" + fi + ;; + jsy,h1|\ + yyy,h1|\ + easepi,ars4|\ + friendlyelec,nanopi-r5c|\ + fastrhino,r66s|\ + hinlink,hnas|\ + hinlink,opc-h66k) + if ethtool -i eth0 | grep -Fq 'driver: r8169'; then + set_iface_cpumask 4 "eth0" + set_iface_cpumask 8 "eth1" + else + set_iface_cpumask 2 "eth0" "eth0-0" && \ + set_iface_cpumask 2 "eth0" "eth0-16" && \ + set_iface_cpumask 8 "eth0" "eth0-18" && \ + set_iface_cpumask 4 "eth1" "eth1-0" && \ + set_iface_cpumask 4 "eth1" "eth1-18" && \ + set_iface_cpumask 1 "eth1" "eth1-16" + fi + ;; + armsom,sige7-v1|\ + friendlyelec,nanopi-r6s|\ + friendlyelec,nanopi-r6c) + set_iface_cpumask 2 eth0 + if ethtool -i eth1 | grep -Fq 'driver: r8169'; then + set_iface_cpumask 4 "eth1" + set_iface_cpumask 8 "eth2" + else + set_iface_cpumask 4 "eth1" "eth1-0" f0 && \ + set_iface_cpumask 4 "eth1" "eth1-16" && \ + set_iface_cpumask 2 "eth1" "eth1-18" && \ + set_iface_cpumask 8 "eth2" "eth2-0" f0 && \ + set_iface_cpumask 8 "eth2" "eth2-18" && \ + set_iface_cpumask 1 "eth2" "eth2-16" + fi + ;; + hinlink,h88k-*|\ + hinlink,h88k) + set_iface_cpumask 2 eth0 + if ethtool -i eth1 | grep -Fq 'driver: r8169'; then + set_iface_cpumask 4 "eth1" + set_iface_cpumask 8 "eth2" && \ + set_iface_cpumask 10 "eth3" && \ + set_iface_cpumask 20 "eth4" + else + set_iface_cpumask 4 "eth1" "eth1-0" f0 && \ + set_iface_cpumask 4 "eth1" "eth1-16" && \ + set_iface_cpumask 2 "eth1" "eth1-18" && \ + set_iface_cpumask 8 "eth2" "eth2-0" f0 && \ + set_iface_cpumask 8 "eth2" "eth2-18" && \ + set_iface_cpumask 1 "eth2" "eth2-16" && \ + set_iface_cpumask 10 "eth3" "eth3-0" f0 && \ + set_iface_cpumask 10 "eth3" "eth3-16" && \ + set_iface_cpumask 8 "eth3" "eth3-18" && \ + set_iface_cpumask 20 "eth4" "eth4-0" f0 && \ + set_iface_cpumask 20 "eth4" "eth4-18" && \ + set_iface_cpumask 4 "eth4" "eth4-16" + fi + ;; + hlink,h28k) + set_iface_cpumask 5 eth0 + set_iface_cpumask b eth1 + ;; + ynn,nas|\ + jp,tvbox|\ + panther,x2|\ + hsa,bh2) + set_iface_cpumask 2 "eth0" + ;; + esac +} + +board_wait_wifi() { + local seconds + [[ -f "/etc/uci-defaults/01-rk35xx-wifi" ]] || return 0 + case $(board_name) in + hinlink,h88k-*|\ + hinlink,h88k|\ + hinlink,opc-h68k|\ + hinlink,opc-h69k) + for seconds in $(seq 0 30); do + [[ -s /etc/config/wireless ]] && break + sleep 1 + done + sleep 1 + ;; + esac +} + +board_fixup_iface_name + +board_set_iface_smp_affinity + +board_wait_wifi diff --git a/configfiles/rk3566-jp-tvbox.dts b/configfiles/rk3566-jp-tvbox.dts new file mode 100644 index 0000000..de281c2 --- /dev/null +++ b/configfiles/rk3566-jp-tvbox.dts @@ -0,0 +1,736 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 tdleiyao + */ + +/dts-v1/; + +#include +#include +#include +#include +#ifdef DTS_NO_LEGACY +#include +#else +#include +#endif +#include "rk3566.dtsi" + +/ { + model = "JianPian TV Box"; + compatible = "jp,tvbox", "rockchip,rk3566"; + + aliases { + ethernet0 = &gmac1; + mmc0 = &sdhci; + mmc1 = &sdmmc1; + }; + + chosen: chosen { + bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; + }; + + fiq_debugger: fiq-debugger { + compatible = "rockchip,fiq-debugger"; + rockchip,serial-id = <2>; + rockchip,wake-irq = <0>; + /* If enable uart uses irq instead of fiq */ + rockchip,irq-mode-enable = <1>; + rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; + }; + + debug: debug@fd904000 { + compatible = "rockchip,debug"; + reg = <0x0 0xfd904000 0x0 0x1000>, + <0x0 0xfd905000 0x0 0x1000>, + <0x0 0xfd906000 0x0 0x1000>, + <0x0 0xfd907000 0x0 0x1000>; + }; + + hdmi_sound: hdmi-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <128>; + simple-audio-card,name = "rockchip,hdmi"; + status = "okay"; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + + simple-audio-card,codec { + sound-dai = <&hdmi>; + }; + }; + + gmac1_clkin: external-gmac1-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac1_clkin"; + #clock-cells = <0>; + }; + + leds { + compatible = "gpio-leds"; + led_status: led-status { + label = "led-status"; + default-state = "on"; + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; + pinctrl-0 = <&led_status_enable_h>; + retain-state-suspended; + status = "okay"; + }; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + sdio_pwrseq: sdio-pwrseq { + status = "okay"; + compatible = "mmc-pwrseq-simple"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <100>; + }; + + wireless_wlan: wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "ap6398s"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_irq>; + WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +}; + +&combphy1_usq { + status = "okay"; +}; + +&combphy2_psq { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + center-supply = <&vdd_logic>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&gmac1 { + snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + phy-mode = "rgmii"; + clock_in_out = "output"; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m0_miim + &gmac1m0_tx_bus2 + &gmac1m0_rx_bus2 + &gmac1m0_rgmii_clk + &gmac1m0_rgmii_bus>; + + tx_delay = <0x41>; + rx_delay = <0x2e>; + + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + status = "okay"; + }; +}; + +&hdmi { + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; +}; + +&hdmi_in_vp0 { + status = "okay"; +}; + +&hdmi_in_vp1 { + status = "disabled"; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_npu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_image"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_image"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc3v3_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + }; + }; +}; + +&i2s1_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx + &i2s1m1_lrcktx &i2s1m1_lrckrx + &i2s1m1_sdi0 &i2s1m1_sdi1 + &i2s1m1_sdi2 &i2s1m1_sdi3 + &i2s1m1_sdo0 &i2s1m1_sdo1 + &i2s1m1_sdo2 &i2s1m1_sdo3>; + status = "disabled"; +}; + +&pinctrl { + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-wlan { + wifi_host_wake_irq: wifi-host-wake-irq { + rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + bt { + bt_enable_h: bt-enable-h { + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_host_wake_l: bt-host-wake-l { + rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_l: bt-wake-l { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + led_status_enable_h: led-status-enable-h { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vcc_3v3>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + no-sdio; + no-sd; + mmc-hs200-1_8v; + supports-emmc; + non-removable; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc1 { + #address-cells = <1>; + #size-cells = <0>; + bus-width = <4>; + max-frequency = <200000000>; + cap-sd-highspeed; + sd-uhs-sdr50; + sd-uhs-sdr104; + cap-sdio-irq; + disable-wp; + supports-sdio; + non-removable; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; + status = "okay"; +}; + +&tsadc { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; + status = "disabled"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + clocks = <&rk809 1>; + clock-names = "lpo"; + device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; + vbat-supply = <&vcc3v3_sys>; + vddio-supply = <&vcca1v8_pmu>; + }; +}; + +&uart2 { + status = "disabled"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&u2phy0_host { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&usbdrd_dwc3 { + dr_mode = "host"; + extcon = <&usb2phy0>; + status = "okay"; +}; + +&usbdrd30 { + status = "okay"; +}; + +&usbhost_dwc3 { + status = "okay"; +}; + +&usbhost30 { + status = "okay"; +}; + +// video output + +&i2s0_8ch { + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&reserved_memory { + ramoops: ramoops@110000 { + compatible = "ramoops"; + reg = <0x0 0x110000 0x0 0xf0000>; + record-size = <0x20000>; + console-size = <0x80000>; + ftrace-size = <0x00000>; + pmsg-size = <0x50000>; + }; +}; + +&bus_npu { + bus-supply = <&vdd_logic>; + pvtm-supply = <&vdd_cpu>; + status = "okay"; +}; + +&iep { + status = "okay"; +}; + +&iep_mmu { + status = "okay"; +}; + +&jpegd { + status = "okay"; +}; + +&jpegd_mmu { + status = "okay"; +}; + +&mpp_srv { + status = "okay"; +}; + +&rk_rga { + status = "okay"; +}; + +&rkvdec { + status = "okay"; +}; + +&rkvdec_mmu { + status = "okay"; +}; + +&rkvenc { + venc-supply = <&vdd_logic>; + status = "okay"; +}; + +&rkvenc_mmu { + status = "okay"; +}; + +&rknpu { + rknpu-supply = <&vdd_npu>; + status = "okay"; +}; + +&rknpu_mmu { + status = "okay"; +}; + +&vdpu { + status = "okay"; +}; + +&vdpu_mmu { + status = "okay"; +}; + +&vepu { + status = "okay"; +}; + +&vepu_mmu { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>, <&cru PLL_GPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; \ No newline at end of file diff --git a/configfiles/rk3566-panther-x2.dts b/configfiles/rk3566-panther-x2.dts new file mode 100644 index 0000000..c4acd23 --- /dev/null +++ b/configfiles/rk3566-panther-x2.dts @@ -0,0 +1,770 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 tdleiyao + */ + +/dts-v1/; + +#include +#include +#include +#include +#ifdef DTS_NO_LEGACY +#include +#else +#include +#endif +#include "rk3566.dtsi" + +/ { + model = "Panther X2"; + compatible = "panther,x2", "rockchip,rk3566"; + + aliases { + ethernet0 = &gmac1; + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + }; + + chosen: chosen { + bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; + }; + + fiq_debugger: fiq-debugger { + compatible = "rockchip,fiq-debugger"; + rockchip,serial-id = <2>; + rockchip,wake-irq = <0>; + /* If enable uart uses irq instead of fiq */ + rockchip,irq-mode-enable = <1>; + rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; + }; + + debug: debug@fd904000 { + compatible = "rockchip,debug"; + reg = <0x0 0xfd904000 0x0 0x1000>, + <0x0 0xfd905000 0x0 0x1000>, + <0x0 0xfd906000 0x0 0x1000>, + <0x0 0xfd907000 0x0 0x1000>; + }; + + gmac1_clkin: external-gmac1-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac1_clkin"; + #clock-cells = <0>; + }; + + leds { + compatible = "gpio-leds"; + led_pwr: led-pwr { + label = "led-pwr"; + default-state = "on"; + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&led_pwr_enable_h>; + retain-state-suspended; + status = "okay"; + }; + + led_wifi: led-wifi { + label = "led-wifi"; + default-state = "off"; + gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&led_wifi_enable_h>; + retain-state-suspended; + status = "okay"; + }; + + led_eth: led-eth { + label = "led-eth"; + default-state = "off"; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&led_eth_enable_h>; + retain-state-suspended; + status = "okay"; + }; + + led_status: led-status { + label = "led-status"; + default-state = "on"; + gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; + pinctrl-0 = <&led_status_enable_h>; + retain-state-suspended; + status = "okay"; + }; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + sdio_pwrseq: sdio-pwrseq { + status = "okay"; + compatible = "mmc-pwrseq-simple"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <100>; + }; + + wireless_wlan: wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "ap6236"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_irq>; + WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + center-supply = <&vdd_logic>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&gmac1 { + snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + phy-mode = "rgmii"; + clock_in_out = "output"; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m0_miim + &gmac1m0_tx_bus2 + &gmac1m0_rx_bus2 + &gmac1m0_rgmii_clk + &gmac1m0_rgmii_bus>; + + tx_delay = <0x41>; + rx_delay = <0x2e>; + + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + status = "okay"; + }; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_npu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_image"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_image"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc3v3_sd"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + }; + }; +}; + +&i2s1_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx + &i2s1m1_lrcktx &i2s1m1_lrckrx + &i2s1m1_sdi0 &i2s1m1_sdi1 + &i2s1m1_sdi2 &i2s1m1_sdi3 + &i2s1m1_sdo0 &i2s1m1_sdo1 + &i2s1m1_sdo2 &i2s1m1_sdo3>; + status = "disabled"; +}; + +&pinctrl { + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-wlan { + wifi_host_wake_irq: wifi-host-wake-irq { + rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + bt { + bt_enable_h: bt-enable-h { + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_host_wake_l: bt-host-wake-l { + rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_l: bt-wake-l { + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + led_pwr_enable_h: led-pwr-enable-h { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_wifi_enable_h: led-wifi-enable-h { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_eth_enable_h: led-eth-enable-h { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_status_enable_h: led-status-enable-h { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vcc_3v3>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_3v3>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + no-sdio; + no-sd; + mmc-hs200-1_8v; + supports-emmc; + non-removable; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + max-frequency = <150000000>; + cap-mmc-highspeed; + cap-sd-highspeed; + supports-sd; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc1 { + #address-cells = <1>; + #size-cells = <0>; + bus-width = <4>; + max-frequency = <150000000>; + cap-sd-highspeed; + sd-uhs-sdr104; + cap-sdio-irq; + disable-wp; + supports-sdio; + non-removable; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; + status = "okay"; +}; + +&tsadc { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; + status = "disabled"; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + clocks = <&rk809 1>; + clock-names = "lpo"; + device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; + vbat-supply = <&vcc3v3_sys>; + vddio-supply = <&vcca1v8_pmu>; + }; +}; + +&uart2 { + status = "disabled"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&u2phy0_host { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&usbdrd_dwc3 { + dr_mode = "host"; + extcon = <&usb2phy0>; + status = "okay"; +}; + +&usbdrd30 { + status = "okay"; +}; + +&usbhost_dwc3 { + status = "okay"; +}; + +&usbhost30 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <100000>; +}; + +&spi3 { + status = "okay"; + //assigned-clock-rates = <200000000>; //默认不用配置，SPI 设备工作时钟 + max-freq = <48000000>; /* spi internal clk, don't modify */ + //dma-names = "tx","rx"; //使能DMA模式 + //rx-sample-delay-ns = <10>; //默认不用配置，读采样延时 + spi_dev@0 { + compatible = "rockchip,spidev"; + reg = <0>; + spi-max-frequency = <12000000>; + spi-lsb-first; + }; +}; + +// video output + +&hdmi { + status = "disabled"; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&reserved_memory { + ramoops: ramoops@110000 { + compatible = "ramoops"; + reg = <0x0 0x110000 0x0 0xf0000>; + record-size = <0x20000>; + console-size = <0x80000>; + ftrace-size = <0x00000>; + pmsg-size = <0x50000>; + }; +}; + +&bus_npu { + bus-supply = <&vdd_logic>; + pvtm-supply = <&vdd_cpu>; + status = "okay"; +}; + +&iep { + status = "okay"; +}; + +&iep_mmu { + status = "okay"; +}; + +&jpegd { + status = "okay"; +}; + +&jpegd_mmu { + status = "okay"; +}; + +&mpp_srv { + status = "okay"; +}; + +&rk_rga { + status = "okay"; +}; + +&rkvdec { + status = "okay"; +}; + +&rkvdec_mmu { + status = "okay"; +}; + +&rkvenc { + venc-supply = <&vdd_logic>; + status = "okay"; +}; + +&rkvenc_mmu { + status = "okay"; +}; + +&rknpu { + rknpu-supply = <&vdd_npu>; + status = "okay"; +}; + +&rknpu_mmu { + status = "okay"; +}; + +&vdpu { + status = "okay"; +}; + +&vdpu_mmu { + status = "okay"; +}; + +&vepu { + status = "okay"; +}; + +&vepu_mmu { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>, <&cru PLL_GPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; \ No newline at end of file diff --git a/configfiles/rk3568-firefly-roc-pc-se-core.dtsi b/configfiles/rk3568-firefly-roc-pc-se-core.dtsi new file mode 100644 index 0000000..1653b47 --- /dev/null +++ b/configfiles/rk3568-firefly-roc-pc-se-core.dtsi @@ -0,0 +1,1016 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * + */ + +#include +#include +#include +#include +#include +#include + +/ { + adc_keys: adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + vol-up-key { + label = "volume up"; + linux,code = ; + press-threshold-microvolt = <1750>; + }; + + vol-down-key { + label = "volume down"; + linux,code = ; + press-threshold-microvolt = <297500>; + }; + + menu-key { + label = "menu"; + linux,code = ; + press-threshold-microvolt = <980000>; + }; + + back-key { + label = "back"; + linux,code = ; + press-threshold-microvolt = <1305500>; + }; + }; + + audiopwmout_diff: audiopwmout-diff { + status = "disabled"; + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "rockchip,audiopwmout-diff"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,bitclock-master = <&master>; + simple-audio-card,frame-master = <&master>; + simple-audio-card,cpu { + sound-dai = <&i2s3_2ch>; + }; + master: simple-audio-card,codec { + sound-dai = <&dig_acodec>; + }; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + hdmi_sound: hdmi-sound { + status = "disabled"; + compatible = "rockchip,hdmi"; + rockchip,mclk-fs = <128>; + rockchip,card-name = "rockchip,hdmi"; + rockchip,cpu = <&i2s0_8ch>; + rockchip,codec = <&hdmi>; + }; + + vcc12v_sata: vcc12v-sata { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_sata"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc12V_sata_enable_h>; + vin-supply = <&dc_12v>; + }; + + pdmics: dummy-codec { + status = "disabled"; + compatible = "rockchip,dummy-codec"; + #sound-dai-cells = <0>; + }; + + pdm_mic_array: pdm-mic-array { + status = "disabled"; + compatible = "simple-audio-card"; + simple-audio-card,name = "rockchip,pdm-mic-array"; + simple-audio-card,cpu { + sound-dai = <&pdm>; + }; + simple-audio-card,codec { + sound-dai = <&pdmics>; + }; + }; + + rk809_sound: rk809-sound { + status = "okay"; + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "rockchip,rk809-codec"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rk809_codec>; + }; + }; + + spdif-sound { + status = "disabled"; + compatible = "simple-audio-card"; + simple-audio-card,name = "ROCKCHIP,SPDIF"; + simple-audio-card,cpu { + sound-dai = <&spdif_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + status = "disabled"; + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + }; + + vad_sound: vad-sound { + status = "disabled"; + compatible = "rockchip,multicodecs-card"; + rockchip,card-name = "rockchip,rk3568-vad"; + rockchip,cpu = <&i2s1_8ch>; + rockchip,codec = <&rk809_codec>, <&vad>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + sata_en: sata_en { + compatible = "regulator-fixed"; + regulator-name = "sata_en"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&asm1064_rst>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc3v3_sys>; + }; +/* + vcc5v0_usb: vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; +*/ + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +// enable-active-high; +// gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; +// pinctrl-names = "default"; +// pinctrl-0 = <&vcc5v0_host_en>; + }; + + vcc5v0_otg: vcc5v0-otg-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_otg"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_otg_en>; + }; + + test-power { + status = "okay"; + }; +}; + +&bus_npu { + bus-supply = <&vdd_logic>; + pvtm-supply = <&vdd_cpu>; + status = "okay"; +}; + +&can0 { + assigned-clocks = <&cru CLK_CAN0>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&can0m1_pins>; + status = "disabled"; +}; + +&can1 { + assigned-clocks = <&cru CLK_CAN1>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&can1m1_pins>; + status = "disabled"; +}; + +&can2 { + assigned-clocks = <&cru CLK_CAN2>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&can2m1_pins>; + status = "disabled"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + center-supply = <&vdd_logic>; + status = "okay"; + + system-status-level = < + /*system status freq level*/ + SYS_STATUS_NORMAL DMC_FREQ_LEVEL_MID_HIGH + >; + + auto-freq-en = <0>; + +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + status = "okay"; + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; + rockchip,phy-table = + <92812500 0x8009 0x0000 0x0270>, + <165000000 0x800b 0x0000 0x026d>, + <185625000 0x800b 0x0000 0x01ed>, + <297000000 0x800b 0x0000 0x01ad>, + <594000000 0x8029 0x0000 0x0088>, + <000000000 0x0000 0x0000 0x0000>; +}; + +&hdmi_in_vp0 { + status = "okay"; +}; + +&hdmi_in_vp1 { + status = "disabled"; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + + vdd_cpu: syr827@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "fan53555-reg"; + pinctrl-names = "default"; + //pinctrl-0 = <&vsel1_gpios>; + //vsel-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <2300>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-initial-state = <3>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default", "pmic-sleep", + "pmic-power-off", "pmic-reset"; + pinctrl-0 = <&pmic_int>; + pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; + pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; + pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; + + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + //fb-inner-reg-idxs = <2>; + /* 1: rst regs (default in codes), 0: rst the pmic */ + pmic-reset-func = <0>; + /* not save the PMIC_POWER_EN register in uboot */ + not-save-power-en = <1>; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + + pwrkey { + status = "okay"; + }; + + pinctrl_rk8xx: pinctrl_rk8xx { + gpio-controller; + #gpio-cells = <2>; + + rk817_slppin_null: rk817_slppin_null { + pins = "gpio_slp"; + function = "pin_fun0"; + }; + + rk817_slppin_slp: rk817_slppin_slp { + pins = "gpio_slp"; + function = "pin_fun1"; + }; + + rk817_slppin_pwrdn: rk817_slppin_pwrdn { + pins = "gpio_slp"; + function = "pin_fun2"; + }; + + rk817_slppin_rst: rk817_slppin_rst { + pins = "gpio_slp"; + function = "pin_fun3"; + }; + }; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_npu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_image"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_image"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc3v3_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + rk809_codec: codec { + #sound-dai-cells = <0>; + compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; + clocks = <&cru I2S1_MCLKOUT>; + clock-names = "mclk"; + assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; + assigned-clock-rates = <12288000>; + assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>; + hp-volume = <20>; + spk-volume = <3>; + mic-in-differential; + status = "okay"; + }; + }; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + status = "okay"; + rockchip,clk-trcm = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; +}; + +&iep { + status = "okay"; +}; + +&iep_mmu { + status = "okay"; +}; + +&jpegd { + status = "okay"; +}; + +&jpegd_mmu { + status = "okay"; +}; + +&mpp_srv { + status = "okay"; +}; + +&nandc0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + nand@0 { + reg = <0>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + nand-ecc-strength = <16>; + nand-ecc-step-size = <1024>; + }; +}; + +&pinctrl { + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + soc_slppin_gpio: soc_slppin_gpio { + rockchip,pins = + <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; + }; + + soc_slppin_slp: soc_slppin_slp { + rockchip,pins = + <0 RK_PA2 1 &pcfg_pull_up>; + }; + + soc_slppin_rst: soc_slppin_rst { + rockchip,pins = + <0 RK_PA2 2 &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sata { + vcc12V_sata_enable_h: vcc12V_sata_enable_h { + rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + asm1064_rst: asm1064_rst { + rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + +}; + + /* + * There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7]. + * 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured; + * 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages + * must be consistent with the software configuration correspondingly + * a/ When the hardware IO level is connected to 1.8V, the software voltage configuration + * should also be configured to 1.8V accordingly; + * b/ When the hardware IO level is connected to 3.3V, the software voltage configuration + * should also be configured to 3.3V accordingly; + * 3/ VCCIO2 voltage control selection (0xFDC20140) + * BIT[0]: 0x0: from GPIO_0A7 (default) + * BIT[0]: 0x1: from GRF + * Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7: + * L:VCCIO2 must supply 3.3V + * H:VCCIO2 must supply 1.8V + */ +/* +&pmu_io_domains { + status = "okay"; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; +}; +*/ + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm7 { + status = "okay"; + + compatible = "rockchip,remotectl-pwm"; + remote_pwm_id = <3>; + handle_cpu_id = <1>; + remote_support_psci = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm7_pins>; + + ir_key1 { + rockchip,usercode = <0x4040>; + rockchip,key_table = + <0xf2 KEY_REPLY>, + <0xba KEY_BACK>, + <0xf4 KEY_UP>, + <0xf1 KEY_DOWN>, + <0xef KEY_LEFT>, + <0xee KEY_RIGHT>, + <0xbd KEY_HOME>, + <0xea KEY_VOLUMEUP>, + <0xe3 KEY_VOLUMEDOWN>, + <0xe2 KEY_SEARCH>, + <0xb2 KEY_POWER>, + <0xbc KEY_MUTE>, + <0xec KEY_MENU>, + <0xbf 0x190>, + <0xe0 0x191>, + <0xe1 0x192>, + <0xe9 183>, + <0xe6 248>, + <0xe8 185>, + <0xe7 186>, + <0xf0 388>, + <0xbe 0x175>; + }; + + ir_key2 { + rockchip,usercode = <0xff00>; + rockchip,key_table = + <0xf9 KEY_HOME>, + <0xbf KEY_BACK>, + <0xfb KEY_MENU>, + <0xaa KEY_REPLY>, + <0xb9 KEY_UP>, + <0xe9 KEY_DOWN>, + <0xb8 KEY_LEFT>, + <0xea KEY_RIGHT>, + <0xeb KEY_VOLUMEDOWN>, + <0xef KEY_VOLUMEUP>, + <0xf7 KEY_MUTE>, + <0xe7 KEY_POWER>, + <0xfc KEY_POWER>, + <0xa9 KEY_VOLUMEDOWN>, + <0xa8 KEY_VOLUMEDOWN>, + <0xe0 KEY_VOLUMEDOWN>, + <0xa5 KEY_VOLUMEDOWN>, + <0xab 183>, + <0xb7 388>, + <0xe8 388>, + <0xf8 184>, + <0xaf 185>, + <0xed KEY_VOLUMEDOWN>, + <0xee 186>, + <0xb3 KEY_VOLUMEDOWN>, + <0xf1 KEY_VOLUMEDOWN>, + <0xf2 KEY_VOLUMEDOWN>, + <0xf3 KEY_SEARCH>, + <0xb4 KEY_VOLUMEDOWN>, + <0xbe KEY_SEARCH>; + }; + + ir_key3 { + rockchip,usercode = <0x1dcc>; + rockchip,key_table = + <0xee KEY_REPLY>, + <0xf0 KEY_BACK>, + <0xf8 KEY_UP>, + <0xbb KEY_DOWN>, + <0xef KEY_LEFT>, + <0xed KEY_RIGHT>, + <0xfc KEY_HOME>, + <0xf1 KEY_VOLUMEUP>, + <0xfd KEY_VOLUMEDOWN>, + <0xb7 KEY_SEARCH>, + <0xff KEY_POWER>, + <0xf3 KEY_MUTE>, + <0xbf KEY_MENU>, + <0xf9 0x191>, + <0xf5 0x192>, + <0xb3 388>, + <0xbe KEY_1>, + <0xba KEY_2>, + <0xb2 KEY_3>, + <0xbd KEY_4>, + <0xf9 KEY_5>, + <0xb1 KEY_6>, + <0xfc KEY_7>, + <0xf8 KEY_8>, + <0xb0 KEY_9>, + <0xb6 KEY_0>, + <0xb5 KEY_BACKSPACE>; + }; +}; + +&rk_rga { + status = "okay"; +}; + +&rkvdec { + status = "okay"; +}; + +&rkvdec_mmu { + status = "okay"; +}; + +&rkvenc { + venc-supply = <&vdd_logic>; + status = "okay"; +}; + +&rkvenc_mmu { + status = "okay"; +}; + +&rknpu { + rknpu-supply = <&vdd_npu>; + status = "okay"; +}; + +&rknpu_mmu { + status = "okay"; +}; + +&route_hdmi { + status = "okay"; + connect = <&vp0_out_hdmi>; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcca_1v8>; +}; + +&sdhci { + bus-width = <8>; + supports-emmc; + non-removable; + max-frequency = <200000000>; + status = "okay"; +}; + +&sdmmc0 { + max-frequency = <150000000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + status = "okay"; +}; + +&sfc { + status = "okay"; +}; + +&spdif_8ch { + status = "disabled"; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy0_host { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + +&u2phy1_host { + status = "okay"; +}; + +&u2phy1_otg { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd_dwc3 { +// dr_mode = "host"; + extcon = <&usb2phy0>; + status = "disabled"; +}; + +&usbdrd30 { + status = "okay"; +}; + +&usbhost_dwc3 { + status = "okay"; +}; + +&usbhost30 { + status = "okay"; +}; + +&vad { + rockchip,audio-src = <&i2s1_8ch>; + rockchip,buffer-time-ms = <128>; + rockchip,det-channel = <0>; + rockchip,mode = <0>; +}; + +&vdpu { + status = "okay"; +}; + +&vdpu_mmu { + status = "okay"; +}; + +&vepu { + status = "okay"; +}; + +&vepu_mmu { + status = "okay"; +}; + +&vop { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; +}; + +&vop_mmu { + status = "okay"; +}; diff --git a/configfiles/rk3568-firefly-roc-pc-se.dts b/configfiles/rk3568-firefly-roc-pc-se.dts new file mode 100644 index 0000000..6b55bdc --- /dev/null +++ b/configfiles/rk3568-firefly-roc-pc-se.dts @@ -0,0 +1,714 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include +#include "rk3568.dtsi" +#include "rk3568-firefly-roc-pc-se-core.dtsi" +#include "rk3568-linux.dtsi" + +/ { +/* + model = "QNAP TS-416 (SDK)"; + compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568"; + + model = "Rockchip RK3568 DG NAS LITE"; + compatible = "rockchip,dg-nas-lite", "rockchip,rk3568"; +*/ + + model = "DG NAS LITE"; + compatible = "dg,nas", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + mmc0 = &sdmmc0; + mmc1 = &sdhci; + }; + + chosen: chosen { + bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; + }; + + fiq_debugger: fiq-debugger { + compatible = "rockchip,fiq-debugger"; + rockchip,serial-id = <2>; + rockchip,wake-irq = <0>; + /* If enable uart uses irq instead of fiq */ + rockchip,irq-mode-enable = <1>; + rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; + }; + + debug: debug@fd904000 { + compatible = "rockchip,debug"; + reg = <0x0 0xfd904000 0x0 0x1000>, + <0x0 0xfd905000 0x0 0x1000>, + <0x0 0xfd906000 0x0 0x1000>, + <0x0 0xfd907000 0x0 0x1000>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc2v8_dvp: vcc2v8-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc2v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc1v8_dvp: vcc1v8-dvp { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + }; +/* + vcc1v5_dvp: vcc1v5-dvp { + compatible = "regulator-fixed"; + regulator-name = "vcc1v5_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + vin-supply = <&vcc3v3_sys>; + }; +*/ + + vcc0v9_dvp: vcc0v9-dvp { + compatible = "regulator-fixed"; + regulator-name = "vcc0v9_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc3v3_sys>; + }; + +/* + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + // clocks = <&rk809 1>; + // clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + post-power-on-delay-ms = <200>; + reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; + status = "disabled"; + }; + + vcc3v3_wifi: vcc3v3-wifi { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_wifi"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + vin-supply = <&vcc3v3_sys>; + }; +*/ + //wifi + wireless_wlan { + compatible = "wlan-platdata"; + wifi_chip_type = "rtl8723du"; + rockchip,grf = <&grf>; + WIFI,poweren_gpio = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; + keep_wifi_power_on; + status = "okay"; + }; + + wireless_bluetooth: wireless-bluetooth { + compatible = "bluetooth-platdata"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + //wifi-bt-power-toggle; + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_user_1>, <&led_user_2>, <&led_sata_0>; + + led-user1 { + label = "green:user1"; + gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + + led-user2 { + label = "blue:user2"; + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; + }; + + led-sata0 { + label = "green:sata0"; + gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; + }; + }; + + fan: pwm-fan { + compatible = "pwm-fan"; + pwms = <&pwm0 0 40000 0>; + fan-supply = <&dc_12v>; + interrupt-parent = <&gpio0>; + interrupts = <20 IRQ_TYPE_EDGE_FALLING>; + pulses-per-revolution = <2>; + }; + +}; + +&pwm0 { + pinctrl-0 = <&pwm0m1_pins>; + //4.19内核需要配置为default + pinctrl-names = "default"; + status = "okay"; +}; + +&pwm4 { + status = "disabled"; +}; + +&pwm5 { + status = "disabled"; +}; + +&pwm15 { + compatible = "rockchip,remotectl-pwm"; + pinctrl-names = "default"; +// pinctrl-names = "active"; + pinctrl-0 = <&pwm15m0_pins>; + remote_pwm_id = <3>; + handle_cpu_id = <1>; + remote_support_psci = <0>; + status = "okay"; + + ir_key1 { + rockchip,usercode = <0x4040>; + rockchip,key_table = + <0xf2 KEY_REPLY>, + <0xba KEY_BACK>, + <0xf4 KEY_UP>, + <0xf1 KEY_DOWN>, + <0xef KEY_LEFT>, + <0xee KEY_RIGHT>, + <0xbd KEY_HOME>, + <0xea KEY_VOLUMEUP>, + <0xe3 KEY_VOLUMEDOWN>, + <0xe2 KEY_SEARCH>, + <0xb2 KEY_POWER>, + <0xbc KEY_MUTE>, + <0xec KEY_MENU>, + <0xbf 0x190>, + <0xe0 0x191>, + <0xe1 0x192>, + <0xe9 183>, + <0xe6 248>, + <0xe8 185>, + <0xe7 186>, + <0xf0 388>, + <0xbe 0x175>; + }; + + ir_key2 { + rockchip,usercode = <0xff00>; + rockchip,key_table = + <0xf9 KEY_HOME>, + <0xbf KEY_BACK>, + <0xfb KEY_MENU>, + <0xaa KEY_REPLY>, + <0xb9 KEY_UP>, + <0xe9 KEY_DOWN>, + <0xb8 KEY_LEFT>, + <0xea KEY_RIGHT>, + <0xeb KEY_VOLUMEDOWN>, + <0xef KEY_VOLUMEUP>, + <0xf7 KEY_MUTE>, + <0xe7 KEY_POWER>, + <0xfc KEY_POWER>, + <0xa9 KEY_VOLUMEDOWN>, + <0xa8 KEY_PLAYPAUSE>, + <0xe0 KEY_VOLUMEDOWN>, + <0xa5 KEY_VOLUMEDOWN>, + <0xab 183>, + <0xb7 388>, + <0xe8 388>, + <0xf8 184>, + <0xaf 185>, + <0xed KEY_VOLUMEDOWN>, + <0xee 186>, + <0xb3 KEY_VOLUMEDOWN>, + <0xf1 KEY_VOLUMEDOWN>, + <0xf2 KEY_VOLUMEDOWN>, + <0xf3 KEY_SEARCH>, + <0xb4 KEY_VOLUMEDOWN>, + <0xa4 KEY_SETUP>, + <0xbe KEY_SEARCH>; + }; + + ir_key3 { + rockchip,usercode = <0x1dcc>; + rockchip,key_table = + <0xee KEY_REPLY>, + <0xf0 KEY_BACK>, + <0xf8 KEY_UP>, + <0xbb KEY_DOWN>, + <0xef KEY_LEFT>, + <0xed KEY_RIGHT>, + <0xfc KEY_HOME>, + <0xf1 KEY_VOLUMEUP>, + <0xfd KEY_VOLUMEDOWN>, + <0xb7 KEY_SEARCH>, + <0xff KEY_POWER>, + <0xf3 KEY_MUTE>, + <0xbf KEY_MENU>, + <0xf9 0x191>, + <0xf5 0x192>, + <0xb3 388>, + <0xbe KEY_1>, + <0xba KEY_2>, + <0xb2 KEY_3>, + <0xbd KEY_4>, + <0xf9 KEY_5>, + <0xb1 KEY_6>, + <0xfc KEY_7>, + <0xf8 KEY_8>, + <0xb0 KEY_9>, + <0xb6 KEY_0>, + <0xb5 KEY_BACKSPACE>; + }; + + ir_key4 { //jp-box + rockchip,usercode = <0xfd01>; + rockchip,key_table = + <0x31 KEY_REPLY>, + <0x2f KEY_BACK>, + <0x35 KEY_UP>, + <0x2d KEY_DOWN>, + <0x66 KEY_LEFT>, + <0x3e KEY_RIGHT>, + <0x6a KEY_HOME>, + <0x5e KEY_VOLUMEUP>, + <0x47 KEY_VOLUMEDOWN>, + <0x23 KEY_POWER>, + <0x3a 388>, + <0x0d KEY_F6>; + }; + +/* +key 102 HOME +key 158 BACK +key 108 DPAD_DOWN +key 103 DPAD_UP +key 105 DPAD_LEFT +key 106 DPAD_RIGHT +key 115 VOLUME_UP +key 114 VOLUME_DOWN +key 116 POWER +key 232 DPAD_CENTER +key 388 PROFILE_SWITCH +key 64 TV_MEDIA_PLAY +*/ +}; + + + +&csi2_dphy_hw { + status = "disabled"; +}; + +&csi2_dphy0 { + status = "disabled"; +}; + +&rkisp { + status = "disabled"; +}; + +&rkisp_mmu { + status = "disabled"; +}; + +&rkisp_vir0 { + status = "disabled"; +}; + + +&i2c2 { + status = "disabled"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "disabled"; +}; + +&i2c5 { + status = "okay"; + + pcf8563: rtc@51 { + status = "okay"; + compatible = "nxp,pcf8563"; + reg = <0x51>; + #clock-cells = <0>; + }; + +}; + + +/*USB3.0 controller 对应lede usb_host0_xhci */ +&usbdrd_dwc3 { + dr_mode = "host"; + extcon = <&usb2phy0>; + status = "okay"; +}; + +/*USB3.0 OTG PHY*/ +&combphy0_us { + status = "okay"; +}; + +/*USB 3.0 HOST 与 SATA1 复用 对应lede usb_host1_xhci */ + +&usbhost_dwc3 { + status = "okay"; +}; + + +/* 对应lede combphy1 */ +&combphy1_usq { +// rockchip,dis-u3otg1-port; + status = "okay"; +}; + +&sata0 { + status = "okay"; +}; + +&sata1 { + status = "disabled"; +}; + +/* PCIE */ +&combphy2_psq { + status = "okay"; +}; + +&uart0 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer>; +}; + +&uart1 { + status = "disabled"; +}; + +&uart2 { + status = "disabled"; +}; + +&uart3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart3m1_xfer>; +}; + +&uart4 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&uart4m0_xfer>; +}; + +&uart5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart5m1_xfer>; +}; + +&uart7 { + status = "disabled"; +// pinctrl-names = "default"; +// pinctrl-0 = <&uart7m1_xfer>; +}; + +&uart8 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&uart8m0_xfer>; +}; + +&mdio0 { + rgmii_phy0: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&mdio1 { + rgmii_phy1: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + //clock_in_out = "output"; + clock_in_out = "input"; + + snps,reset-gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + assigned-clock-rates = <0>, <125000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + tx_delay = <0x2e>; + rx_delay = <0x2a>; + + phy-handle = <&rgmii_phy0>; + phy-supply = <&vcc_phy>; + status = "okay"; +}; + +&gmac1 { + phy-mode = "rgmii"; + //clock_in_out = "output"; + clock_in_out = "input"; + + snps,reset-gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + + tx_delay = <0x3d>; + rx_delay = <0x23>; + + phy-handle = <&rgmii_phy1>; + phy-supply = <&vcc_phy>; + status = "disabled"; +}; +/* +&sdmmc2 { + supports-sdio; + bus-width = <0x4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; +// mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + sd-uhs-sdr104; + status = "disabled"; +}; +*/ +&can1 { + assigned-clocks = <&cru CLK_CAN1>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&can1m1_pins>; + status = "disabled"; +}; + +&can2 { + assigned-clocks = <&cru CLK_CAN2>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&can2m1_pins>; + status = "disabled"; +}; + + +&pcie2x1 { + num-lanes = <1>; + num-viewport = <4>; + pinctrl-0 = <&asm1064_rst>; + reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc5v0_sys>; + status = "okay"; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_h>; + reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_sys>; + status = "okay"; +}; + +&spi3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>; +// pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>; + st7789v@0 { + status = "okay"; + compatible = "sitronix,st7789v"; + reg = <0>; + spi-max-frequency = <12000000>; + bgr; + fps = <30>; + rotate = <90>; + buswidth = <8>; + dc-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; + led-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>; + debug = <0>; //等级0～7 越高信息越多 + }; +}; + +&pwm7 { + status = "disabled"; +}; + + +&rk809_codec { + status = "disabled"; + spk-mute-delay-ms = <30>; +}; + +&rk809_sound { + status = "disabled"; +}; + +&spi1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <3 RK_PC1 3 &pcfg_pull_none>; + spi_dev@00 { + compatible = "rockchip,spidev"; + reg = <0x0>; + spi-max-frequency = <0xb71b00>; + }; +}; + + +/* 对应lede usb2phy0_host */ +&u2phy0_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +/* 对应lede usb2phy0_otg */ +&u2phy0_otg { +// vbus-supply = <&vcc5v0_otg>; + status = "disabled"; +}; + +/* lede usb2phy1_host */ +&u2phy1_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +/* lede usb2phy1_otg */ +&u2phy1_otg { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + + +&pinctrl { +/* + wifi { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +*/ + leds { + led_user_1: led_user_1 { + rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_user_2: led_user_2 { + rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + led_sata_0: led_sata_0 { + rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + spi1 { + /omit-if-no-ref/ + spi1m1_mosi: spi1m1-mosi { + rockchip,pins = + <3 RK_PC1 3 &pcfg_pull_none>; + }; + + }; + + fan-fg { + fg_pin: fg-pin { + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie_reset_h: pcie-reset-h { + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + +}; + +&its { + status = "okay"; +}; + +&rng { + status = "okay"; +}; \ No newline at end of file diff --git a/configfiles/rk35xx.mk b/configfiles/rk35xx.mk new file mode 100644 index 0000000..3977584 --- /dev/null +++ b/configfiles/rk35xx.mk @@ -0,0 +1,308 @@ +define Device/rk3568 + SOC := rk3568 + DEVICE_DTS_DIR := ../dts/rk3568 + DEVICE_DTS = $$(SOC)-$$(lastword $$(subst _, ,$$(DEVICE_NAME))) + UBOOT_DEVICE_NAME := easepi-rk3568 + IMAGE/sysupgrade.img.gz := boot-common | boot-script rk3568 | pine64-img | gzip | append-metadata +endef + +define Device/rk3568_combined + IMAGE/combined.img.gz := boot-combined | boot-script rk3568-cb | pine64-img | gzip | append-metadata + IMAGES := combined.img.gz +endef + +define Device/rk3568_combined_fastrhino + IMAGE/combined.img.gz := boot-combined | boot-script rk3568-fastrhino | pine64-img | gzip | append-metadata + IMAGES := combined.img.gz +endef + +define Device/rk3568_combined_friendlyelec + IMAGE/combined.img.gz := boot-combined | boot-script rk3568-friendlyelec | pine64-img | gzip | append-metadata + IMAGES := combined.img.gz +endef + +define Device/rk3568_combined_hinlink + IMAGE/combined.img.gz := boot-combined | boot-script rk3568-hinlink | pine64-img | gzip | append-metadata + IMAGES := combined.img.gz +endef + +define Device/rk3568_combined_nlnet + IMAGE/combined.img.gz := boot-combined | boot-script rk3568-nlnet | pine64-img | gzip | append-metadata + IMAGES := combined.img.gz +endef + +define Device/rk3588 + SOC := rk3588 + DEVICE_DTS_DIR := ../dts/rk3588 + DEVICE_DTS = $$(SOC)-$$(lastword $$(subst _, ,$$(DEVICE_NAME))) + UBOOT_DEVICE_NAME := easepi-rk3588 + IMAGE/sysupgrade.img.gz := boot-common | boot-script rk3588 | pine64-img | gzip | append-metadata +endef + +define Device/rk3588_combined + IMAGE/combined.img.gz := boot-combined | boot-script rk3588-cb | pine64-img | gzip | append-metadata + IMAGES := combined.img.gz +endef + +define Device/rk3588_combined_friendlyelec + IMAGE/combined.img.gz := boot-combined | boot-script rk3588-friendlyelec | pine64-img | gzip | append-metadata + IMAGES := combined.img.gz +endef + +define Device/rk3588_combined_hinlink + IMAGE/combined.img.gz := boot-combined | boot-script rk3588-hinlink | pine64-img | gzip | append-metadata + IMAGES := combined.img.gz +endef + +define Device/rk3528 + SOC := rk3528 + DEVICE_DTS_DIR := ../dts/rk3528 + DEVICE_DTS = $$(SOC)-$$(lastword $$(subst _, ,$$(DEVICE_NAME))) + UBOOT_DEVICE_NAME := easepi-rk3528 + IMAGE/sysupgrade.img.gz := boot-common | boot-script rk3528 | pine64-img | gzip | append-metadata +endef + +define Device/rk3566 +$(call Device/rk3568) + SOC := rk3566 +endef + +define Device/armsom_sige7-v1 +$(call Device/rk3588) + DEVICE_VENDOR := ArmSoM + DEVICE_MODEL := sige7 + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-hwmon-pwmfan kmod-thermal +endef +TARGET_DEVICES += armsom_sige7-v1 + +define Device/fastrhino_common +$(call Device/rk3568) + DEVICE_VENDOR := FastRhino + DEVICE_PACKAGES := kmod-r8125 +endef + +define Device/fastrhino_r66s +$(call Device/fastrhino_common) + DEVICE_MODEL := R66S +endef +TARGET_DEVICES += fastrhino_r66s + +define Device/fastrhino_r68s +$(call Device/fastrhino_common) + DEVICE_MODEL := R68S +endef +TARGET_DEVICES += fastrhino_r68s + +define Device/fastrhino_r6xs +$(call Device/fastrhino_common) +$(call Device/rk3568_combined_fastrhino) + DEVICE_MODEL := R68s/R66s combined + SUPPORTED_DEVICES += fastrhino,r66s fastrhino,r68s + DEVICE_DTS := rk3568-r66s rk3568-r68s +endef +TARGET_DEVICES += fastrhino_r6xs + +define Device/hinlink_common +$(call Device/rk3568) + DEVICE_VENDOR := HINLINK + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-scsi-core kmod-hwmon-pwmfan kmod-thermal +endef + +define Device/hinlink_opc-h6xk +$(call Device/hinlink_common) +$(call Device/rk3568_combined_hinlink) + DEVICE_MODEL := OPC-H69K/H68K/H66K combined + SUPPORTED_DEVICES += hinlink,opc-h66k hinlink,opc-h68k hinlink,opc-h69k + DEVICE_DTS := rk3568-opc-h66k rk3568-opc-h68k rk3568-opc-h69k +endef +TARGET_DEVICES += hinlink_opc-h6xk + +define Device/hinlink_hnas +$(call Device/hinlink_common) + DEVICE_MODEL := HNAS + SUPPORTED_DEVICES += hinlink,hnas +endef +TARGET_DEVICES += hinlink_hnas + +define Device/easepi_ars4 +$(call Device/rk3568) + DEVICE_VENDOR := EasePi + DEVICE_MODEL := ARS4 + SUPPORTED_DEVICES += easepi,ars4 + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-scsi-core kmod-hwmon-pwmfan kmod-thermal +endef +TARGET_DEVICES += easepi_ars4 + +define Device/friendlyarm_nanopi-r5s +$(call Device/rk3568) +$(call Device/rk3568_combined_friendlyelec) + DEVICE_VENDOR := FriendlyARM + DEVICE_MODEL := NanoPi R5S/R5C combined + SUPPORTED_DEVICES += friendlyelec,nanopi-r5s friendlyarm,nanopi-r5s friendlyelec,nanopi-r5c + DEVICE_DTS := rk3568-nanopi-r5s rk3568-nanopi-r5c + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-scsi-core kmod-hwmon-pwmfan kmod-thermal +endef +TARGET_DEVICES += friendlyarm_nanopi-r5s + +define Device/firefly_station-p2 +$(call Device/rk3568) + DEVICE_VENDOR := Firefly + DEVICE_MODEL := Station P2 / ROC PC + DEVICE_DTS := rk3568-firefly-roc-pc + SUPPORTED_DEVICES += firefly,rk3568-roc-pc firefly,station-p2 + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-scsi-core +endef +TARGET_DEVICES += firefly_station-p2 + +define Device/friendlyarm_nanopi-r6s +$(call Device/rk3588) +$(call Device/rk3588_combined_friendlyelec) + DEVICE_VENDOR := FriendlyARM + DEVICE_MODEL := NanoPi R6S/R6C + SUPPORTED_DEVICES += friendlyelec,nanopi-r6s friendlyelec,nanopi-r6c + DEVICE_DTS := rk3588-nanopi-r6s rk3588-nanopi-r6c + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-thermal +endef +TARGET_DEVICES += friendlyarm_nanopi-r6s + +define Device/lyt_t68m +$(call Device/rk3568) + DEVICE_VENDOR := LYT + DEVICE_MODEL := T68M + SUPPORTED_DEVICES += lyt,t68m + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-scsi-core +endef +TARGET_DEVICES += lyt_t68m + +define Device/hinlink_rk3588 +$(call Device/rk3588) + DEVICE_VENDOR := HINLINK + DEVICE_PACKAGES := kmod-r8125 kmod-nvme +endef + +define Device/hinlink_h88k +$(call Device/hinlink_rk3588) +$(call Device/rk3588_combined_hinlink) + DEVICE_MODEL := H88K + SUPPORTED_DEVICES += hinlink,h88k-v2 hinlink,h88k-v3 hinlink,h88k + DEVICE_DTS := rk3588-h88k-v2 rk3588-h88k-v3 +endef +TARGET_DEVICES += hinlink_h88k + +define Device/hinlink_rk3528 +$(call Device/rk3528) + DEVICE_VENDOR := HINLINK + DEVICE_PACKAGES := kmod-r8168 kmod-thermal +endef + +define Device/hlink_h28k +$(call Device/hinlink_rk3528) + DEVICE_VENDOR := Hlink + DEVICE_MODEL := H28K + SUPPORTED_DEVICES += hlink,h28k +endef +TARGET_DEVICES += hlink_h28k + +define Device/inspur_ihec301 +$(call Device/rk3588) + DEVICE_VENDOR := Inspur + DEVICE_MODEL := IHEC301 + DEVICE_PACKAGES := kmod-scsi-core kmod-hwmon-pwmfan kmod-thermal kmod-switch-rtl8367b swconfig +endef +TARGET_DEVICES += inspur_ihec301 + +define Device/jsy_h1 +$(call Device/rk3568) + DEVICE_VENDOR := JSY + DEVICE_MODEL := H1 + DEVICE_DTS := rk3568-jsy-h1 + SUPPORTED_DEVICES += jsy,h1 + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-scsi-core kmod-thermal kmod-leds-pwm +endef +TARGET_DEVICES += jsy_h1 + +define Device/yyy_h1 +$(call Device/rk3568) + DEVICE_VENDOR := YYY + DEVICE_MODEL := H1 + DEVICE_DTS := rk3568-yyy-h1 + SUPPORTED_DEVICES += yyy,h1 + DEVICE_PACKAGES := kmod-r8125 kmod-nvme kmod-thermal kmod-hwmon-pwmfan kmod-backlight-gpio kmod-leds-pwm +endef +TARGET_DEVICES += yyy_h1 + +define Device/idiskk_h1 +$(call Device/rk3568) + DEVICE_VENDOR := iDiskk + DEVICE_MODEL := H1 + DEVICE_DTS := rk3568-idiskk-h1 + SUPPORTED_DEVICES += idiskk,h1 + DEVICE_PACKAGES := kmod-scsi-core kmod-thermal kmod-hwmon-pwmfan kmod-backlight-gpio kmod-leds-pwm +endef +TARGET_DEVICES += idiskk_h1 + +define Device/ynn_ynnnas + $(call Device/rk3566) + DEVICE_VENDOR := YingNiuNiu + DEVICE_MODEL := NAS + SUPPORTED_DEVICES += ynn,nas + DEVICE_PACKAGES := kmod-scsi-core +endef +TARGET_DEVICES += ynn_ynnnas + +define Device/jp_tvbox +$(call Device/rk3566) + DEVICE_VENDOR := JianPian + DEVICE_MODEL := TV Box + DEVICE_DTS := rk3566-jp-tvbox + SUPPORTED_DEVICES += jp,tvbox + DEVICE_PACKAGES := kmod-scsi-core +endef +TARGET_DEVICES += jp_tvbox + +define Device/panther_x2 +$(call Device/rk3566) + DEVICE_VENDOR := Panther + DEVICE_MODEL := X2 + DEVICE_DTS := rk3566-panther-x2 + SUPPORTED_DEVICES += panther,x2 +endef +TARGET_DEVICES += panther_x2 + +define Device/nlnet_xgp +$(call Device/rk3568) +$(call Device/rk3568_combined_nlnet) + DEVICE_VENDOR := NLnet + DEVICE_MODEL := XiGuaPi + UBOOT_DEVICE_NAME := xgp-rk3568 + SUPPORTED_DEVICES += nlnet,xgp + DEVICE_PACKAGES := kmod-nvme kmod-scsi-core kmod-hwmon-pwmfan kmod-thermal + DEVICE_DTS := rk3568-xgp rk3568-xgp-v3 +endef +TARGET_DEVICES += nlnet_xgp + +define Device/rk_demo-rtl8367s +$(call Device/rk3568) + DEVICE_VENDOR := Rockchip + DEVICE_MODEL := Demo RTL8367S + DEVICE_PACKAGES := kmod-scsi-core kmod-hwmon-pwmfan kmod-thermal kmod-switch-rtl8367b swconfig +endef +# TARGET_DEVICES += rk_demo-rtl8367s + + +define Device/rk3308 + SOC := rk3308 + DEVICE_DTS_DIR := ../dts/rk3308 + DEVICE_DTS = $$(SOC)-$$(lastword $$(subst _, ,$$(DEVICE_NAME))) + UBOOT_DEVICE_NAME := easepi-rk3308 + IMAGE/sysupgrade.img.gz := boot-common | boot-script rk3308-uart2 | pine64-img | gzip | append-metadata +endef + +define Device/armsom_p2-pro +$(call Device/rk3308) + DEVICE_VENDOR := ArmSoM + DEVICE_MODEL := P2 Pro + SUPPORTED_DEVICES := armsom,p2pro armsom,p2-pro + DEVICE_PACKAGES := kmod-usb-net-rtl8152 ethtool kmod-rkwifi-bcmdhd rkwifi-firmware-ap6256 kmod-sound-soc-rk3308 +endef +# TARGET_DEVICES += armsom_p2-pro